Low power design

Designing components and systems with an emphasis on minimizing active (dynamic) and standby (static) power consumption. Increasingly this is addressed by careful logical design of the design in RTL together with companion "power intent", provided as Unified Power Format (UPF) annotation, standardized in IEEE 1801 specification.

 

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Resources
Low Power Methodology Manual (LPMM)
IEEE Standard 1801-2018 for Design and Verification of Low Power Electronic Systems (available to download through the IEEE GET Program)

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Segu Sunil Kumar
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Design Verification
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Verification Engineer
 
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Rashi Dutt
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Mixed-signal SoC; Neuromorphic Computing; Brain-inspired Learning Accelerators
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Designing components and systems with an emphasis on minimizing active (dynamic) and standby (static) power consumption. Increasingly this is addressed by careful logical design of the design in RTL together with companion "power intent", provided as Unified Power Format (UPF) annotation, standardized in IEEE 1801 specification.

 

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Resources
Low Power Methodology Manual (LPMM)
IEEE Standard 1801-2018 for Design and Verification of Low Power Electronic Systems (available to download through the IEEE GET Program)

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